运放的满功率带宽

一般运放除了标识有小信号增益带宽积之外,还标识有满功率带宽。

它代表的其实并不是运放在满功率输出时候的带宽,而是运放在可允许的最大输出摆幅电压条件下,因为受运放压摆率限制,输出信号不失真时的最大输入信号频率。

集成运放一般采用主极点补偿的方式来做内部相位补偿。由于补偿电容充放电电容受外电路的限制,输入瞬变信号时,补偿电容来不及充放电,就会使输出波形失真。这个最大的充放电速率就是运放的Slew rate。

对于正弦输入来说,信号变化率最大值(导数极大值)为:Sr=2*pi*F*Vp  其中:F为其频率,Vp为其幅度

当输入信号的Sr不大于运放的Slew rate的时候,输出就不会发生失真。给定Vp条件下允许的不失真最大输入信号频率为:Fmax=SR/(2*pi*Vp)

这个,Fmax就是满功率带宽。

Erno Borbely’s all FET Shunt Regulator Analysis

Erno Borbely是一名电子工程师,专注于模拟电路,特别是音频领域。他在音响界著述丰富,经常有新的点子、电路发表。

这个“全FET并联稳压器”在网络上鼎鼎大名,堪称低噪声稳压器设计的典范,近日在diyaudio上看到有一个帖子讨论起这个电路,也有好心人附上了原理图,终得一窥庐山面目,

eb

 

 

 

 

 

并联稳压电路其实网络上不乏范例,譬如说一个给电子管供电的High Power High Voltage并联稳压电路,设计也颇为考究,但是终究没有在噪声问题上过分关注。

相反,这个电路的设计始终以低噪声为设计目标,我想作者甚至因此牺牲了其它的指标性能。

首先是CCS(恒流源),它并没有用TL431或者稳压管来提供固定的Vgs,反而用了“简陋”的PN结。不过TL431和稳压管之类的器件噪声都太大了,并且是宽频白噪声,一旦产生了就很难完全滤除。PN结也有半导体固有的噪声,但是幅值小多了,把温漂看做噪声的话,那么它仅仅是一窄带的低频噪声。C1作用有二,其一是给HS1提供平滑的Vgs,也就是滤波,滤除叠加在Vgs上的交流成分;其二是旁路,电源侧的纹波电压经由C1后绝大部分降落在R7上。

基准源相关电路为D1、C5、R9、C7,D1为恒流二极管,负责给稳压管D3提供“干净”的工作偏置电流,C5为滤波电容,R9、C7组成低通滤波电路,可以极大的去除D3端的噪声成分。因为Q5为孪生场效应管,故而R9取值可以相对很大(当然也要考虑到R9自身的噪声问题),低通滤波的截止频率可以设置得很低,从而对高频噪声的衰减足够大。

Q5、Q7、Q8为典型的Cascode差分放大电路,值得一提的是,Q5为音频用低噪声场效应对管2SK389。D5为放大器的有源负载,使用有源负载是为了尽可能提高直流放大倍数,它的直流增益甚至可以和早期运放的开环放大倍数相比拟。Q11构成一级对电源共源放大电路,用来提高电路的电流驱动能力(抑或放大倍数?)C11为高频密勒补偿电容,C13的存在同样降低了比较器放大环路的高频增益。R19和R21用于给并联调整管提供合适的直流偏置。最后,C9用来补偿分压取样网络对误差信号的衰减。

低噪声的秘诀是?我想是能不用能带间隙基准源和齐纳/雪崩基准源就尽量不用吧,如果用了,一定要让它通过低通滤波器。

一种push button debounce方法的FPGA实现

按钮开关的毛刺去除问题是数字电路初级设计者必须碰到的问题,虽然现在已经有很多高级开关器件内部集成了数字硬滤波器,不过在FPGA领域下讨论此问题,还是期望能起到抛砖引玉的效果。
按钮开关按下去的时候,由于开关弹性接触片的跳跃性接触,所得波形如下所示(以常闭开关为例):debounce思路:
开关没有动作时,设置一个标志位(flag)为高,这时候允许FPGA的高速时钟信号下降沿采样开关输入,并次序移位至一个4bit长的移位寄存器。某个时刻,开关按下时,将会因为输入信号的一个下降沿而在移位寄存器里面出现0011,当出现此组合时,将通过高速时钟的上升沿同步置标志位(flag)为零,停止移位。
同时,设置一计数器(长度决定于高速时钟频率以及延时时间),在开关输入为低电平时做加一计数,而如果有高电平,就清零计数器。设置计数器到其最大值时同步置位标志位(flag),并且置位优先级高于刚才的清零操作。开关反弹的高电平会清零计数器,而不断延迟计数器到达最大计数值。在开关稳定按下,出现连续的低电平后的某一时刻,标志位重新变为一。这样,通过标志位(flag)的电平变化完成了一次开关按下的记录过程,且记录过程的清零和置位是经由时钟同步的,所以不会有任何毛刺。
在标志位变为零的时刻,移位寄存器里面始终为0011,不过由于置位操作优先级高于清零,所以在计数器到达最大值时刻,会将标志位置位,且在上升沿之后的时钟下降沿会因为移入一个新的bit至移位寄存器而使其内容发生改变,变为0001,这样在下个时钟上升沿时刻,就不会再有清零操作发生了。
最后几行是一个简单的脉冲发生器
代码:

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跨阻放大器带宽和稳定性分析

电流输出型DAC或者光电检测等电路一般需要一个跨阻放大器进行I/V转换。电路模型如下:

r1

 

 

 

 

 

 

 

其中Cs为反相输入端的总输入电容(包含反相输入端共模电容、差模电容、以及电流源的输出电容),Cf为反馈电容(如果电路没有反馈电容,则可为反馈电阻的寄生电容或PCB杂散电容或其总和)。Rf为I/V电阻,决定了低频端的跨阻增益值。 (more…)

晶振耗散功率测量

在晶振的测试中,有一项测试是确保晶振本体耗散的功率不超过厂家规定最大功率值。晶振的等效电路如下所示,

crystal1

 

 

 

 

 

 

 

其中C0是真实存在的物理量,代表晶体自身和封装的寄生电容,C1,R1,L1均为机械量到物理量的等效值。可以看出,晶振的唯一耗能器件就是R1,晶体耗散的功率也就是R1上耗散的功率。晶振做并联振荡时的电路如下图,

crystal2

 

 

 

 

 

 

 

回忆并联谐振电路的一个别名—-电流谐振,在谐振时会有Q倍注入电流大小的大电流在LC之间做能量交换,这个电流自然流过R1。实际测量中,我们仅仅能近似测得流过CL的电流i(一般在晶体的一个引脚串入一根导线,用电流探头测量),却并不知道流过C0的电流I0。不过I和I0有明显的比率关系,因为C0和CL上是同一电压,故而有,

I/SCL=I0/SC0——>I*C0=I0*CL

自然,流过R1的电流为二者之和(两个电流同相位!),从而,

P=I^2*R1=(I+I0)^2*R1=I^2*(1+C0/CL)^2*R1

在大部分资料上,直接定义,

crystal3

 

 

前述为其来源。

音频功放VAS级频率响应分析

几乎所有的分立元器件功率放大器都会设置一级VAS级,它贡献系统增益的绝大部分,低频增益典型值为1K~100K。进而,系统做频率补偿时,如果采用主极点补偿,则必然会在这一级做“手脚”。以MOSFET VAS为例,我们有如下等效电路,

vas1

 

 

 

 

 

 

 

这是一个三极两零系统,手工计算已经显得不太可能了。用Hspice可以得到精确的零极点值。缺点是你永远不知道各个元器件对零极点位置的影响。
不过,如果我们对电路做一些近似,系统就可以简化为二极一零系统。简化后的电路如下, (more…)

LED温度系数

发光二极管PN结正向压降和温度的关系如下:

led1

 

 

 

其中Vj为PN结电压降,e为电子电量、Eg为PN结禁带宽度(能量)k为波尔兹曼常数

而测得的二极管外部压降和温度关系为:

led2

 

 

 

Ea为串联电阻的掺杂激活能量,S为与迁移率相关的量,Rs为串联电阻的阻值。

直接用公式来计算发光二极管正向压降和温度间的关系是可行的,不过在应用中常采用测量的方法。

在室温到120°之间,二极管正向压降和温度间的关系近似为线性。

对于红色LED,温度系数约为 -1.5mV/摄氏度

绿色LED,约为 -3.8mV/摄氏度

蓝色LED,约为-5mV/摄氏度

紫外LED,约为-2.3mV/摄氏度

————–

从概率论我们知道,如果一个参数的值受很多独立因素影响,那么它的值就服从正态分布。

对于电子元器件的各种参数值也不例外,譬如标称10K电阻的阻值,那么它的标称阻值是正态分布的期望值。

阻值的最大/小偏差则取决于正态分布的均方差,一般为4倍均方差值。

运放的输入偏移电压是一个例外,它的典型值并不等于期望值,因为期望是零,所以典型值一栏写的是均方差值,最大值则随厂家而变化,有的是四倍均方差,有的是六倍均方差。

Extreme Low Noise Preamplifier

0,4 nV/Sqr(Hz) and less – isn’t that low?

My original intention (but who cares about that, anyway?)

Originally I looked for a very low noise balanced preamplifierfor dynamic microphones, but with a gain of 20 dB only. Very lownoise was meant to be 1.5 nV/Sqr(Hz) or less. I thought thisshould be easy as usual ICs like the INA103 provide as low as1.0 nV/Sqr(Hz) voltage noise. But I was wrong.

Why do low-gain amplifiers produce more noise than a high-gainones?This is for two reasons: The current noise of the input stageand the voltage noise of the feedback resister network. Have alook at the following circuit diagram:

 

low1

 

 

 

 

 

 

The overall amplifier noise is summed up from the followingsources:

–    The input voltage noise of the Amplifier(UNoiseIn)
–    The positive input current noise multipliedby the impedance of the signal source (RSource x INoisePosIn)
–    The negative input current noise multipliedby the source resistance of the feedback resistor divider ((R1parallel to R2) x INoiseNegIn)
–    The resistor noise of of the feedback resistordivider (R1 parallel to R2)

Of course the resistance of signal source, e. g. the microphone,adds another noise, but we can’t influence that with the designof the amplifier so I don’t include it here. My goal is the designof a preamplifier that adds so few noise to the signal that thenoise caused by the preamplifier compared to the signal source’snoise is really negligible. You should know that summing noisephysically is and mathematically must be done by summing the squareof the individual noise voltages and afterwards extracting theroot from this sum:

UNoiseSum = Sqr(UNoise12 + UNoise22 + UNoise32 +… + UNoiseN2)

The noise of a 200 Ω resistor amounts to 1.82 nV/Sqr(Hz).Should the preamplifier produce another 1.0 nV/Sqr(Hz), the sumwould become 2.08 nV/Sqr(Hz), i. e. approx. 1 dB morethan the source. My goal of 1.5 nV/Sqr(Hz) was “moderate”.

When you look at the INA103 you’ll find the current noise specifiedfor its signal inputs (INoisePosIn) there, but notfor the feedback inputs (INoiseNegIn). In fact, asthe feedback inputs are the emitters of the input transistors,the input current noise there is significantly higher that thaton the signal inputs, which are the transistor’s bases. The problem,particularly for low gains, occurs at these feedback inputs.

The INA103 provides feedback resistors of 3 kΩ ateach side (R1 in the circuit above). You cannot reducethem, the op-amp won’t work, either because the driver capacitanceis too low or the system gets instable. You have to use them.For a gain of 10 you need 2 x 333 Ω (or 1 x 333 Ω,R2 in the circuit above) to set a gain of 10. Thisresistor network produces 3.15 nV/Sqr(Hz) of voltage noiseand even more caused by the (unspecified) current noise of theINA103. The sum is 5 nV/Sqr(Hz) approx. – far, far away from mygoal and drastically reducing the system’s noise performance.

So what can be done to reduce the input noise?The feedback resistor divider’s output resistance must drasticallybe reduced. It is, by the way, drastically lower when the gainis high, i. e. it is 6 Ω only in case the gain is 1000(60 dB). But for low gains it is difficult to reduce. Justimagine a gain of 2 and a feedback resistance of 6 Ω:The divider in the circuit above ought to built from two 12 Ωresistors! The input power for this divider would be 4 Win case of an output voltage of 10 Vrms, whichis not an unusual voltage in average amplifier stages.

I did not want to go that far, but a power output stage sufficientto drive 100 Ω dividers (90 + 10 Ω)should be aimed.

I finally ended in a fully discrete circuit with a very highopen-loop gain and an appropriate power output stage. I made lotsof experiments, experiences and measurements for lowest noisetransistors. Particularly measuring these small voltages and currentsreliably and to make these measurements reproducible is reallydifficult and sometimes almost drove me mad.

My ultra-low noise preamplifier circuitThe circuit diagram below shows my prototype, an unbalancedamplifier with a gain of 1000 built for experiments and for noisemeasurements. It is, so to speak, one half of the INA103 inputstage. I was disappointed to realize that it was not possibleto reduce it’s gain down to 10. I had expected that I only hadto increase C4 sufficiently, but the system shows relaxationoscillations. I am convinced that the huge open loop gain hasto be reduced to avoid that.

low2

 

 

 

 

 

Transistor SelectionThe noise performance, on the other hand is much better thanI originally aimed. Currently the input voltage noise isas low as 0.45 nV/Sqr(Hz), or, for a balanced version, itwould be 0.64 nV/Sqr(Hz). I tested a couple of transistors.The best ones all were high-voltage power transistors. My favoritesup now are BF459 or MJE13007. BF459 is better when current noisematters, i. e. impedances like dynamic microphones and low gains.MJE13007 produces less voltage noise, but much more current noiseand is better for low-impedance sources like ribbon microphonesand high gains.

I cannot explain why these transistors are good and othersnot. Some say it’s the base resistance that matters, but I believethis is not the whole truth. (Electronics, to my point of view,should not be a matter of believing, but I’m not a semiconductorphysician and what shall I do as long as I do not know. I wouldhighly appreciate everybody giving me an exact explanation.) Highercollector currents, up to a certain limit, reduce the input voltagenoise, but increase the input current noise(s). Depending on thesource resistance a specific collector current is optimal.

The voltage noises, measured at a collector current of 4 mAapprox. and source and feed-back resistances of 1 Ωeach are:

 

Single BF459 0.54 nV/Sqr(Hz) Dual BF459 0.45 nV/Sqr(Hz) Single MJE13007 0.38 nV/Sqr(Hz)

Theoretically an improvement of 3 dB could be expectedusing two transistors in parallel, each with the same collectorcurrent as the single one, but practically, if at all, it is muchless. This obviously is caused by comparably high noise currentsthrough the source and feed-back resistances. There was no improvementwith two MJE13007 in parallel. Instead, at low frequencies thenoise was slightly increased, a typical effect of current noise.I did not investigate that further. Instead, I would rather testseveral more transistors, as those few I happened to have wereso different from each other that it is very likely to find significantlybetter ones.

As an example, here are the noise measured spectra of a fewmeasurements:

low3

 

 

 

 

 

 

 

 

 

 

 

 

 

From bottom to top:

Brown: MJE13007
Red: Two BF459 in parallel
Pink: BF459
Green: BC549C, a “low-noise”, low power transistor,for comparison
Blue: Two BF459 in parallel, 1 kΩ as source resistance

In the latter spectrum the 1/f base-current noise is obvious.It can be calculated as 1.5 pA/Sqr(Hz) approx. @ 2 mA collectorcurrent through each transistor.

Further transistors I tested:

BD237, BD437, TIP152, BF471, MJE340 and several low and mediumpower transistors. Next best to the BF459 is the MJE340, whichwas my favorite until I tested the BF459.

Better do not build this circuit…… unless you are not able to discriminate by smell if a transistoror a resistor is about to get hot!

low4

 

 

 

 

 

 

 

 

 

 

This is an experimental circuit. It rather should not be usedin practice as it shows some problems that should not occur. E.g., small input voltages of some 10 or few 100 mV are sufficientto destroy the circuit because the input transistor’s collectorcurrent can cause high reverse currents through the emitter ofT4 and destroy it. I did not test the zener diode ZDabove proposed in the circuit diagram above which might help.Also, I sometimes observed the circuit falling into an oscillatingstate. I did not investigate this further, it did not happen often.Both problems should not occur when a source is fixed (not plugged)to the input. But as I said, the more harm- than useful huge openloop gain should be reduced anyway.

For a more precise gain and lower low frequency limit I recommendto use an OSCON 2700 µF/2.5 V from Sanyoas electrolytic capacitor C5, which is as small asthe standard one I used in my prototype but has 1/10thof its ESR (10 instead of 100 mΩ).

This project is experimental. Should you work on somethingwhere it might be interesting, i. e. on microphones, or shouldit be interesting for you anyhow else, I’d appreciate your feed-back.So you are very welcome to emailme!

Source Adress:http://www.beis.de/Elektronik/LNPreAmp/LNPreAmp.html

脉冲发生器

前几日,设计中突然觉着需要一个电路,在外来一个脉冲后,能输出唯一的一个宽度为系统时钟周期的脉冲,竟不知此为所谓脉冲发生器。思索几日,亦有一得如下,

原理图:

pulse_sch_revise

 

 

 

 

 

 

 

 

 

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